Hi Mathy,
I'll try to adopt 1MB SRAM but I need to know how you solved memory bank's decoding. Are you using some CPLD or separately ICs to do that? I found your 1MB upgrade using SIMM DRAM module but decoding way you're using is little bit strange for me :-)
One more question. Is your RAM upgrade mod compatible with e.g. U1M?
Regards, pancio
https://abbuc.de/forum/viewtopic.php?p=1466#p1466
Mathy schrieb: Hello pancio
My upgrade uses port B bits 0, 1, 2, 3, 6 and 7. If port B pins 4 and 5 are high, bits 0, 1, 6 and 7 work as usual. If either bit 4 or bit 5 or both go(es) low, the status of BASIC, OS ROM/RAM, Selftest and Missile Command (XEGS only) is frozen and bits 0, 1, 6 and 7 only control expanded RAM (as do bits 2 and 3).
Sincerely
Mathy